Description

The MOSART project aims to develop a flexible, modular, multi-core on-chip platform architecture and associated exploration design methods and tools. The approach should allow the scaling of the platform and optimisation of its constituent elements for various embedded, multimedia and wireless communication applications. To achieve this, the MOSART project is organised to six Workpackages:

• WP1 will develop a scalable, modular, multi-core on chip platform with distributed computing and storage resources, glued at chip level with a NoC backbone.
• WP2 will develop data management methods, middleware and runtime support for optimization of memory accesses, data transfers, allocation and assignments.
• WP3 will develop design methods and prototype tools for application parallelisation, application-platform exploration, ASIP interfaces and architecture/instruction set exploration and design for multi-core on-chip platform.
• WP4 will carry out the validation and evaluation of the architecture, its elements and the design methodology approach by applying them to two representative application cases: a multi-mode broadband wireless communication system and a new urban wireless communication network.
• WP5 addresses dissemination and exploitation.
• WP6 deals with the management of the project.

Complete Workpackage List

WP1: Multi-core Network-on-Chip architecture (M1-M30)
Workpackage Leader: Axel Jantsch, KTH

WP2: Data storage optimization and middleware (M1-M27)
Workpackage Leader: Dimitrios Soudris, ICCS

WP3: Design methods and tools for scalable parallel processing (M1-M33)
Workpackage Leader: Geert Vanmeerbeeck, IMEC

WP4: Validation and evaluation (M1-M36)
Workpackage Leader: Frank Ieromnimon, INTRACOM

WP5: Dissemination and exploitation (M1-M36)
Workpackage Leader: Bart Vanthournout, SYNOPSYS

WP6: Project Management (M1-M36)
Workpackage Leader: Bernard Candaele, Project Coordinator, THALES Communications