MOSART Journals, Book Chapters and Conference Publications

 Journal Publications

 Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios soudris and  Axel Jantsch, "Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Orgnanizations", accepted for publication in IEEE Embedded Systems Letters, 2011.

 Sandro Penolazzi, Ahmed Hemani and Luca Bolognino, "A General Approach to High-Level Energy and Performance Estimation in SoCs", Journal of Low Power Electronics (JOLPE), volume 5, no. 3, pp. 373-384, October 2009.  (Abstract)

 Sotirios Xydis, George Economakos, Dimitrios Soudris and Kiamal Pekmestzi, "High Performance and Area Efficient Flexible DSP Datapath Synthesis", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 14 pages.

 Jean-Yves Mignolet and Roel Wuyts, "Embedded Multiprocessor Systems-on-Chip Programming", Journal of IEEE Software, vol. 26, no. 3, pp. 34-41, May-June 2009.

 Jean-Yves Mignolet, Rogier Baert, Thomas J. Ashby, Prabhat Avasare, Hye-On Jang and Jae Cheol Son, "MPA: Parallelizing an Application onto a Multicore Platform Made Easy", Journal of IEEE Micro, vo. 29, no. 3, pp. 31-39, May-June 2009.

 Jari Kreku, Mika Hoppari, Tuomo Kestila, Yang Qu, Juha-Pekka Soininen and  Kari Tiensyrja, "Combining UML2 and SystemC Application Platform Modelling for Performance Evaluation of Real-Time Systems", EURASIP Journal on Embedded Systems, volume 2008, ARTICLE ID 712329, 18 pages.  (Abstract)

 Sotirios Xydis, George Economakos and Kiamal Z. Pekmestzi, "Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths", INTEGRATION, the VLSI Journal, volume 2009, 18 pages.

 Book Chapter Publications

 Jari Kreku, Mika Hoppari, Tuomo Kestila, Yang Qu, Juha-Pekka Soininen and  Kari Tiensyrja, "Application Workload and SystemC Platform Modelling for Performance Evaluation", chapter included in the book including the best papers of the 11th Forum of Specification and Design Languages, (FDL 2008), September 23-25, Stuttgart, Germany, 2008. (Abstract)

 Conference and Workshop Publications

 Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen,Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrja, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wieferink, Bart Vanthournout and Philippe Martin, "Mapping Optimisation for Scalable multi-core ARchiTecture: The MOSART approach", in Proceedings of the 2010 IEEE International Symposium on VLSI (ISVLSI 2010), July 5-7, Lixouri, Kefalonia, Greence, 2010.

 Sotirios Xydis, Christos Skouroumounis, Kiamal Pekmestzi, Dimitrios Soudris and George Economakos, "Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching", in Proceedings of the 2010 IEEE International Symposium on VLSI (ISVLSI 2010), July 5-7, Lixouri, Kefalonia, Greence, 2010.

 Sotirios Xydis, Christos Skouroumounis, Kiamal Pekmestzi, Dimitrios Soudris and George Economakos, "Designing Efficient DSP Datapaths Through Compiler-in-the-Loop Exploration Methodology", in Proceedings of the 2010 International Symposium on Circuits and Systems (ISCAS 2010), May 30th - June 2, Paris, France, 2010.   (presentation)  (Abstract)

 Jari Kreku and Kari Tiensyrjä, "Automatic workload generation for system-level exploration based on modified GCC compiler", accepted for presentation in Proceedings of the 2010 Conference on Design, Automation and Test Europe (DATE 2010), March 8-12, Dresden, Germany, 2010.   (presentation)  (Abstract)

 Xiaowen Chen, Zhonghai Lu, Axel Jantsch and Shuming Chen, "Supporting Distributed Shared Memory on Multi-core Network-on-Chips Using a Dual Microcoded Controller", accepted for presentation in the Design, Automation and Test Europe Conference (DATE 2010), 8-12 March, Dresden, Germany, 2010.  (presentation)  (Abstract)

 S. Penolazzi, I. Sander and A. Hemani, "Predicting Energy and Performance Overhead of Real-Time Operating Systems", accepted for presentation in the Design, Automation and Test Europe Conference (DATE 2010), 8-12 March, Dresden, Germany, 2010.  (presentation)  (Abstract)

 Abdul Naheem, Xiaowen Chen, Zhonghai Lu and Axel Jantsch, "Scalability of Weak Consistency in NoC Based Multicore Architectures", accepted for presentation in the 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010), May 30th - June 2th, Paris, France, 2010.  (presentation)  (Abstract)

 Nikolaos Zompakis, Vasileios Tsoutsouras, Alexandros Bartzas, Dimitrios Soudris and Georgios Pavlos, "Dynamic Frequency Scaling for MPSoCs based on Chaotic Workload Analysis", accepted for presentation in the PARMA Workshop of Parallel Programming and Run-time Management Techniques for Many-core Architectures, February 22th, Hannover, Germany, 2010.

 Zhonghai Lu and Axel Jantsch, "Trends of terascale computing chips in the next ten years", in Proceedings of the 8th IEEE Conference on ASIC (ASICON), Changsha, China, October 20-23, 2009. (invited paper)  (Abstract)

 Xiaowen Chen, Zhonghai Lu, Axel Jantsch and Shuming Chen, "Speedup Analysis of Data-parallel Applications on Multi-core NoCs", in Proceedings of the 8th IEEE Conference on ASIC (ASICON), Changsha, China, October 20-23, 2009.  (presentation)  (Abstract)

  Jean-Michel Chabloz and Ahmed Hemani, "A Flexible Communication Scheme for Rationally-Related Clock Frequencies“, in Proceedings of the 2009 International Conference on Computer Design (ICCD 2009), 4-7 October, Lake Tahoe, California, 2009.  (presentation)  (Abstract)

 Sandro Penolazzi, Luca Bolognino and Ahmed Hemani, "Energy and Performance Model of a SPARC Leon3 Processor", in Proceedings of the 12th Euromicro Conference on Digital System Design (DSD 2009), 8-12 March, Dresden, Germany, 2010.  (presentation)  (Abstract)

 Iraklis Anagnostopoulos, Alexandros Bartzas and Dimitrios Soudris, "Application-Specific Temperature Reduction Systematic Methodology for 2D and 3D Networks-on-Chip", in Proceedings of the 19th International Workshop of Power and Timing, Modeling and Simulation (PATMOS 2009), September 9-11, Delft, The Netherlands, 2009.

 Nikolaos Zompakis, Martin Trautmann, Alexandros Bartzas, Stylianos Mamagkakis, Dimitrios Soudris, Liesbet Van der Perre and Francky Catthoor, "Multi-granularity NoC Simulation Framework for Early Phase Exploration of SDR Hardware Platforms", in Proceedings of the 19th International Workshop of Power and Timing, Modeling and Simulation (PATMOS 2009), September 9-11, Delft, The Netherlands, 2009.

 George Gkiokes, George Economakos, Angelos Amditis and Nikolaos Uzunoglou, "Recursive Systematic Convolutional Code Simulation for Ofdm - 802.11p System and FPGA Implementation Using an ESL Methodology", accepted for publications in Proceedings of the 12th Euromicro Conference on Digital System Design (DSD 2009), 27-29 August, Patras, Greece, 2009.

 Dimitrios Soudris, "3D-Reconfigurable Architectures: Design exploration and tool development", invited talk in the D43DQ System Design for 3D Silicon Integration Workshop - MINATEC, June 17-18, Grenoble, France, 2009.

 Subayal Khan, Susanna Pantsar-Syväniemi, Jari Kreku, Kari Tiensyrjä and Juha-Pekka Soininen, "Linking GENESYS Application Architecture Modelling with Platform Performance Simulation", in Proceedings of the 12th Forum on Specification and Design Languages (FDL 2009), September 22-24, Sophia Antipolis, France, 2009.  (presentation)  (Abstract)

 Rogier Baert, Erik Brockmeyer, Sven Wuytack and Thomas J. Ashby, "Exploring parallelizations of applications for MPSoC platforms using MPA", in Proceedings of the Design, Automation, Test and Exhibition Conference 2009 (DATE 2009), April 20-24, Nice, France, 2009.

 Alexandros Bartzas, Kostas Siozios and Dimitrios Soudris, "Topology Exploration and Buffer Sizing for Three-Dimensional Networks-on-Chip", presented in the 3D Integration – Technology, Architecture, Design, Automation and Test Workshop, organized in conjuction with DATE 2009, Friday 24th, Nice, France, 2009.

 Nikolaos Zompakis, Martin Trautmann, Alexandros Bartzas, Stylianos Mamagkakis, Dimitrios Soudris, Liesbet Van der Perre and Francky Catthoor, "Multi-granularity NoC simulation framework for early phase exploration of SDR platforms", presented in Designing for embedded parallel computing platforms: architectures, tools, and applications Workshop, organized in conjuction with DATE 2009, Friday 24th, Nice, France, 2009.

 Sandro Penolazzi, Ahmed Hemani and Luca Bolognino, "A General Approach to High Level Energy and Performance Estimation in SoCs", in Proceedings of the 22nd International Conference on VLSI Design (VLSIDesign 2009), January 5-9, New Dehli, India, 2009.  (presentation)  (Abstract)

 Yuang Zhang, Zhonghai Lu, Axel Jantsch, Li Li and Minglun Gao,  "Towards Hierarchical Cluster based Cache Coherence for Large-Scale Network-on-Chip", to appear in the 4th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2009), April 6-7, Cairo, Egypt, 2009.  (Abstract)

 Yuang Zhang, Li Li, Yang Shengguang, Dong Lan, Lou Xiaoxiang and Giao Minglun, "A Scalable Distributed Memory Architecture for Network on Chip", in Proceedings of the 9th IEEE Biennial Asia-Pacific Conference on Circuits and Systems (APCCAS 2008), November 30 - December 3, Macao, China, 2008.

 Jari Kreku, Mika Hoppari, Tuomo Kestila, Yang Qu, Juha-Pekka Soininen and  Kari Tiensyrja, "Application - platform performance modeling and evaluation", in Proceedings of the 11th Forum of specification and Design Languages (FDL 2008), September 23-25, Stuttgart, Germany, 2008.  (presentation)  (Abstract)

 Zhonghai Lu, Lei Xia and Axel Jantsch, "Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip", in Proceedings of the 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2008), April 16-18, Bratislava, Slovakia, 2008.

 Other publications

 Sotirios Xydis, Iraklis Anagnostopoulos, Alexandros Bartzas and Dimitrios Soudris, "Dynamic Memory Management Customization for Multi-Processor Systems-on-Chip", accepted for presentation in the University Booth of the 2010 Design, Automation and Test Europe Conference (DATE 2010), 8-12 March, Dresden, Germany, 2010.

 Sotirios Xydis, Kiamal Pekmestzi, Dimitrios Soudris and George Economakos, "High Performance Flexible Coprocessor Synthesis", accepted for presentation in the PHD Forum of the 2010 Design, Automation and Test Europe Conference (DATE 2010), 8-12 March, Dresden, Germany, 2010.

 Alexandros Bartzas, "Dynamic Memory Optimizations for Embedded Systems Using Software Metadata", accepted for presentation in the PHD Forum of the 2010 Design, Automation and Test Europe Conference (DATE 2010), 8-12 March, Dresden, Germany, 2010.

 Iraklis Anagnostopoulos, Alexandros Bartzas, Kostas Siozios and Dimitrios Soudris, "Networks-on-Chip: 2D/3D Architectures and Design Flow", Poster presentation in the ACACES Summer School 2009, 12-18 July, Terrassa (near Barcelona), Spain, 2009.

 B. Candaele, B. Jomard, A. Jantsch, G. Vanmeerbeeck, M. Wouters, K. Tiensyrja, C. Potamianos, B. Vanthournout, P. Di Crescenzo, D. Soudris and A. Bartzas, "MOSART: Mapping Optimization for Scalable multi-core ARchitecTure", Paper and Poster Presentation, in Proceedings of the 2008 International Conference on Very Large Scale Integration (VLSI-SoC 2008), October 13-15, Rhodes Island, Greece, 2008.